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Commit 7bbf9d4c authored by Guilherme Arthur Gerônimo's avatar Guilherme Arthur Gerônimo
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Adding missing _si_blob tables

parent f9f63f45
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...@@ -12,6 +12,13 @@ CREATE TYPE smartdata_v1.v1_1_digital ( ...@@ -12,6 +12,13 @@ CREATE TYPE smartdata_v1.v1_1_digital (
gw bigint gw bigint
); );
CREATE TYPE smartdata_v1.v1_1_si_blob (
period int,
gateway bigint,
uncertainty int,
data blob
);
CREATE TYPE smartdata_v1.v1_2_si ( CREATE TYPE smartdata_v1.v1_2_si (
value double, value double,
error tinyint, error tinyint,
...@@ -30,4 +37,11 @@ CREATE TYPE smartdata_v1.v1_2_digital ( ...@@ -30,4 +37,11 @@ CREATE TYPE smartdata_v1.v1_2_digital (
y int, y int,
z int, z int,
gw bigint gw bigint
);
CREATE TYPE smartdata_v1.v1_2_si_blob (
period int,
gateway bigint,
uncertainty int,
data blob
); );
\ No newline at end of file
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